Chapter 1
Introduction to ARM Processor
1.1) Project Description
Our project was to design a Reduced Instruction Set Computer (RISC) using a
specialized hardware description language, and to implement the design on
an Erasable Programmable Logic Device (EPLD).
The project had some specific design specifications that had to be met but
the rest of the design was left up to us. The design specifications that
had to be met were that:
1. Processor would be a true 32-bit processor. That is, both the
instruction size and the datapath would be 32-bits.
2. Processor would follow a Von Neuman style architecture. That is, have a
single memory, rather than have separate memories for instruction and data.
3. In a register style instruction there would be one write register and
two read registers.
1.1.1) RISC
A Reduced Instruction Set Computer (RISC) is a microprocessor that has been
designed to perform a small set of instructions, with the aim of reducing
the overall speed of the processor. The RISC concept first originated in
the early 1970's when an IBM research team proved that 20% of instruction
did 80% of the work. The RISC architecture follows the philosophy that one
instruction should be performed every clock cycle.
1.1.2) VHDL
VHDL is a special purpose programming language that deals with the design
and modeling of digital systems. VHDL stands for Very high-speed integrated
circuit Hardware Description Language. It was originally developed by the
United State's department of defense but has since been adopted by the
Institute of Electrical and
Electronic Engineers (IEEE) and is now one of the leading hardware
description languages available today.
There are several reasons why you would choose to implement a design using
VHDL.
1. Through the use of Structural Modeling VHDL can describe how a system is
composed of smaller systems and the connections between them.
2. Behavioral Modeling allows a system's functionality to be described
using common programming language forms.
3. Using VHDL allows simulation of a digital design before the design is
put into manufacture. This of course increases development and testing
times, which leads to decreased costs.
1.2) About the ARM processor
The ARM architecture has been designed to allow very small, yet high-
performance implementations. The architectural simplicity of ARM processors
leads to very small implementations, and small implementations allow
devices with very low power consumption.
The ARM is a Reduced Instruction Set Computer (RISC), as it incorporates
these typical RISC architecture features:
A large uniform register file
A load/store architecture, where data-processing operations only operate on
register contents, not directly on memory contents
Simple addressing modes, with all load/store addresses being determined
from register contents and instruction fields only
Uniform and fixed-length instruction fields, to simplify instruction
decode.
In addition, the ARM architecture gives you:
Control over both Arithmetic Logic Unit (ALU) and shifter in every data-
processing instruction to maximize the use of an ALU and a shifter
Load and Store multiple to maximize data throughput.
These enhancements to a basic RISC architecture allow ARM processors to
achieve a good balance of high performance, low code sizeand low power
consumption.
1.3) ARM Block diagram
The main parts of the ARM processor are:
1. Register file: The processor has a total of 37 registers made up of
31 general 32 bit registers and 6 status registers
2. Booth Multiplier
3. Barrel shifter
4. Arithmetic Logic Unit (ALU)
5. Control Unit.
Figure (1-1): ARM Block Diagram